A Processor Architecture for Discrete Wavelet Transform Processing of Gray Level Image
نویسندگان
چکیده
This paper presents a novel architecture for discrete wavelet transform processing of gray level image. From several processor-time allocation scheme we found a quite optimal one that eflciently use the available processor-time slots. The algorithm is then mapped into an array architecture . The resulted architecture needs less processing elements than conventional architecture and has a simple control scheme, thus reduces complexity and space requirements in hardware implementation.
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